1. The Field of the Invention
The present invention is related to programmable devices. More particularly, the present invention relates to a method by which programmable devices, such as network processors, can continuously execute instructions without interruption.
2. The Related Technology
In recent years, the use of programmable devices has grown tremendously. Programmable devices, such as central processing units for personal computers, or application-specific integrated circuits used in industrial and consumer electronics, have a variety of important uses. In general, programmable devices operate by executing instructions provided by a host application. The instructions are loaded from the host application into an instruction stack. The instructions in the stack are accessed and executed line-by-line by the programmable device until all of the instructions are exhausted. The programmable device is then temporarily idled, or interrupted, while new instructions are loaded into the stack.
One example of a particularly useful programmable device is a network processor. A network processor is used to analyze data contained in communications traffic transmitted via a communications medium, such as a computer network. The data are monitored by the network processor to discover and diagnose possible problem conditions existing within the network, thereby enabling corrective action to be taken.
A new generation of network processors, known as synchronous network processors, has recently been developed to meet the demand for analysis of communications traffic transmitted via high-speed networks, where the transmission rate can exceed 1 gigabit per second. This new generation of synchronous network processors represents a significant advancement in the art. Older network processors are unable to analyze the full volume of network traffic at the same rate at which the traffic is transmitted via the high-speed network, and must therefore use memory registers to buffer the incoming traffic, then analyze it at a slower rate or analyze less than the full volume of data. In contrast, synchronous network processors are able to input and analyze data at a rate synchronous with the speed at which the traffic is passed through the network, which as stated above, can reach rates of 1 gigabit per second or more. Thus, synchronous network processors are superior in their ability to monitor and debug network traffic while eliminating latency between data input and processing.
Notwithstanding their enhanced capability, however, synchronous network processors have not been usable in certain processing environments in which it is important to avoid interruption of the instructions that are provided to the processors. In order to process network traffic effectively in such processing environments, the synchronous network processor would need to be able to continually execute instructions from a host application without interruption. However, conventional techniques of using an instruction stack to provide the instruction input are not compatible with such requirements, because the act of reloading the instruction stack causes interruption of the processor. Thus, synchronous network processors have not been capable of use in an entire class of processing environments.
One example of an operating environment in which continuous execution of instructions is important is one in which the network processor communicates over a data link with another device using a protocol that requires periodic transmission of data packets or ordered sets. In general, continuous execution of instructions is required when the network processor is originating or repeating network data traffic or performing another function that requires either continuous operation or data output.
One approach to extending the usefulness of synchronous network processors is to increase the size of the memory components that implements the instruction stack, thereby reducing the frequency by which the instruction stack needs to be reloaded. However, a larger instruction stack increases the cost and can reduce the efficiency of the processors. Moreover, to the extent that the larger instruction stacks still need to be reloaded during operation of the processors, the act of reloading the instruction stacks can nonetheless cause unacceptable interruption of the operation of the processors.
A need therefore exists whereby a constant stream of instructions can be reliably provided to a programmable device, such as a synchronous network processor, in order to avoid inconsistent or erroneous results that can otherwise occur. A further need exists to ensure proper operation of a synchronous network processor in connection with high-speed communications networks having line speeds exceeding 1 gigabit per second.